Book Image

LLVM Essentials

By : Mayur Pandey, Suyog Sarda, David Farago
Book Image

LLVM Essentials

By: Mayur Pandey, Suyog Sarda, David Farago

Overview of this book

LLVM is currently the point of interest for many firms, and has a very active open source community. It provides us with a compiler infrastructure that can be used to write a compiler for a language. It provides us with a set of reusable libraries that can be used to optimize code, and a target-independent code generator to generate code for different backends. It also provides us with a lot of other utility tools that can be easily integrated into compiler projects. This book details how you can use the LLVM compiler infrastructure libraries effectively, and will enable you to design your own custom compiler with LLVM in a snap. We start with the basics, where you’ll get to know all about LLVM. We then cover how you can use LLVM library calls to emit intermediate representation (IR) of simple and complex high-level language paradigms. Moving on, we show you how to implement optimizations at different levels, write an optimization pass, generate code that is independent of a target, and then map the code generated to a backend. The book also walks you through CLANG, IR to IR transformations, advanced IR block transformations, and target machines. By the end of this book, you’ll be able to easily utilize the LLVM libraries in your own projects.

Related Content you might be interested in

Current Title:

Small book image
LLVM Essentials
Mayur Pandey | Suyog Sarda | David Farago
Dec, 2015 | 166 pages
No titles found
Table of Contents (14 chapters)
LLVM Essentials
LLVM Essentials
Credits
Credits
About the Authors
About the Authors
About the Reviewer
About the Reviewer
www.PacktPub.com
www.PacktPub.com
Preface
Preface
Free Chapter
1
Playing with LLVM
Playing with LLVM
Modular design and collection of libraries
Getting familiar with LLVM IR
LLVM tools and using them in the command line
Summary
2
Building LLVM IR
Building LLVM IR
Creating an LLVM module
Emitting a function in a module
Adding a block to a function
Emitting a global variable
Emitting a return statement
Emitting function arguments
Emitting a simple arithmetic statement in a basic block
Emitting if-else condition IR
Emitting LLVM IR for loop
Summary
3
Advanced LLVM IR
Advanced LLVM IR
Memory access operations
Getting the address of an element
Reading from the memory
Writing into a memory location
Inserting a scalar into a vector
Extracting a scalar from a vector
Summary
4
Basic IR Transformations
Basic IR Transformations
Opt Tool
Pass and Pass Manager
Using other Pass info in current Pass
Instruction simplification example
Instruction Combining
Summary
5
Advanced IR Block Transformations
Advanced IR Block Transformations
Loop processing
Scalar evolution
LLVM intrinsics
Vectorization
Summary
6
IR to Selection DAG phase
IR to Selection DAG phase
Converting IR to selectionDAG
Legalizing SelectionDAG
Optimizing SelectionDAG
Instruction Selection
Scheduling and emitting machine instructions
Register allocation
Code Emission
Summary
7
Generating Code for Target Architecture
Generating Code for Target Architecture
Sample backend
Implementing frame lowering
Lowering instructions
Printing an instruction
Summary
Index
Index

Legalizing SelectionDAG

In the preceding topic, we saw how an IR is converted to SelectionDAG. The whole process didn't involve any knowledge of target architecture for which we are trying to generate code. A DAG node might be illegal for the given target architecture. For example, the X86 architecture doesn't support the sdiv instruction. Instead, it supports sdivrem instruction. This target specific information is conveyed to the SelectionDAG phase by the TargetLowering interface. Targets implement this interface to describe how LLVM IR instructions should be lowered to legal SelectionDAG operations.

In our IR case, we need to 'expand' the sdiv instruction to 'sdivrem' instruction. In the function void SelectionDAGLegalize::LegalizeOp(SDNode *Node), the TargetLowering::Expand case is encountered, which invokes the ExpandNode() function call on that particular node.

void SelectionDAGLegalize::LegalizeOp(SDNode *Node){
…
…
case TargetLowering::Expand:
      ExpandNode(Node);
      return;...
Previous Section
End of Section 3
Next Section