Book Image

Hands-On Deep Learning with Go

By : Gareth Seneque, Darrell Chua
Book Image

Hands-On Deep Learning with Go

By: Gareth Seneque, Darrell Chua

Overview of this book

Go is an open source programming language designed by Google for handling large-scale projects efficiently. The Go ecosystem comprises some really powerful deep learning tools such as DQN and CUDA. With this book, you'll be able to use these tools to train and deploy scalable deep learning models from scratch. This deep learning book begins by introducing you to a variety of tools and libraries available in Go. It then takes you through building neural networks, including activation functions and the learning algorithms that make neural networks tick. In addition to this, you'll learn how to build advanced architectures such as autoencoders, restricted Boltzmann machines (RBMs), convolutional neural networks (CNNs), recurrent neural networks (RNNs), and more. You'll also understand how you can scale model deployments on the AWS cloud infrastructure for training and inference. By the end of this book, you'll have mastered the art of building, training, and deploying deep learning models in Go to solve real-world problems.
Table of Contents (15 chapters)
Free Chapter
1
Section 1: Deep Learning in Go, Neural Networks, and How to Train Them
6
Section 2: Implementing Deep Neural Network Architectures
11
Section 3: Pipeline, Deployment, and Beyond!

CPUs versus GPUs

At this point, we've covered much of the basic theory and practice of neural networks, but we haven't given much consideration to the processors running them. So let's take a break from coding and go into more depth about the little slices of silicon that are actually doing the work.

The 30,000-foot view is that CPUs were originally designed to favor scalar operations, which are performed sequentially, and GPUs are designed for vector operations, which are performed in parallel. Neural networks perform a large number of independent calculations within a layer (say, each neuron multiplied by its weight), and so they are a processing workload amenable to a chip design that favors massive parallelism.

Let's make this a little more concrete by walking through an example of the types of operations that take advantage of the performance characteristics...