Book Image

Embedded Systems Architecture

By : Daniele Lacamera
Book Image

Embedded Systems Architecture

By: Daniele Lacamera

Overview of this book

Embedded systems are self-contained devices with a dedicated purpose. We come across a variety of fields of applications for embedded systems in industries such as automotive, telecommunications, healthcare and consumer electronics, just to name a few. Embedded Systems Architecture begins with a bird's eye view of embedded development and how it differs from the other systems that you may be familiar with. You will first be guided to set up an optimal development environment, then move on to software tools and methodologies to improve the work flow. You will explore the boot-up mechanisms and the memory management strategies typical of a real-time embedded system. Through the analysis of the programming interface of the reference microcontroller, you'll look at the implementation of the features and the device drivers. Next, you'll learn about the techniques used to reduce power consumption. Then you will be introduced to the technologies, protocols and security aspects related to integrating the system into IoT solutions. By the end of the book, you will have explored various aspects of embedded architecture, including task synchronization in a multi-threading environment, and the safety models adopted by modern real-time operating systems.
Table of Contents (18 chapters)
Title Page
Copyright and Credits
Packt Upsell

The interrupt vector table

The interruptvector table, often abbreviated to IVT or simply IV, is an array of pointers to functions, associated by the CPU to handle specific exceptions, such as faults, system service requests from the application, and interrupt requests from peripherals. The IVT is usually located at the beginning of the binary image, and thus stored starting from the lowest address in the flash memory.

An interrupt request from a hardware component or peripheral will force the CPU to abruptly suspend the execution, and execute the function at the associated position in the vector. For this reason, these functions are called interrupt service routines (or simply ISR). Runtime exceptions and faults can be handled in the same way as hardware interrupts, so special service routines are associated to internal CPU triggers through the same table.

The order of the ISR enumerated in the vector and their exact positions depend on the CPU architecture, the microcontroller model, and...