Though not every FPGA is structured the same way, the general principle remains the same: they are arrays of logic elements that can be configured to form specific circuits. The complexity of these logic elements (LEs) therefore determines what kind of logic circuits can be formed, which has to be taken into account when writing VHDL code for a specific FPGA architecture.
The terms logic elements (LEs) and logic cells (LCs) are used interchangeably. An LE consists of one or more look-up tables (LUTs), with an LUT usually having between four and six inputs. Regardless of the exact configuration, each LE is surrounded by interconnection logic, which allows different LEs to be connected to each other, and the LE itself is programmed to a specific configuration, thus forming the intended circuit.
This potential pitfalls of developing for FPGAs include the strong assumption by FPGA manufacturers that FPGAs will be used with clocked designs (using a central clock source and clock...