Book Image

Embedded Systems Architecture

By : Daniele Lacamera
Book Image

Embedded Systems Architecture

By: Daniele Lacamera

Overview of this book

Embedded systems are self-contained devices with a dedicated purpose. We come across a variety of fields of applications for embedded systems in industries such as automotive, telecommunications, healthcare and consumer electronics, just to name a few. Embedded Systems Architecture begins with a bird's eye view of embedded development and how it differs from the other systems that you may be familiar with. You will first be guided to set up an optimal development environment, then move on to software tools and methodologies to improve the work flow. You will explore the boot-up mechanisms and the memory management strategies typical of a real-time embedded system. Through the analysis of the programming interface of the reference microcontroller, you'll look at the implementation of the features and the device drivers. Next, you'll learn about the techniques used to reduce power consumption. Then you will be introduced to the technologies, protocols and security aspects related to integrating the system into IoT solutions. By the end of the book, you will have explored various aspects of embedded architecture, including task synchronization in a multi-threading environment, and the safety models adopted by modern real-time operating systems.
Table of Contents (18 chapters)
Title Page
Copyright and Credits
Packt Upsell
Contributors
Preface
Index

I2C bus


The third serial communication protocol analyzed in this chapter is I2C. From the communication strategy point of view, this protocol shares some similarities with SPI. However, the default bit rate for I2C communication is much lower, as the protocol privileges lower-power consumption over throughput.

The same two-wire bus can accommodate multiple participants, both master and slaves, and there is no need for extra signals to physically select the slave of the transaction, as slaves have fixed logic addresses assigned:

I2C bus with three slaves and external pull-up resistors

One wire transports the clock generated by the master, and the other is used as a full-duplex, bidirectional synchronous data path. This is possible thanks to the unique mechanism of arbitration of the channel, which relies on the electronic design of the transceivers, and may deal with the presence of multiple masters on the same bus in a very clean way.

The two signals must be connected to the high-level voltage...