Book Image

LLVM Essentials

By : Mayur Pandey, Suyog Sarda, David Farago
Book Image

LLVM Essentials

By: Mayur Pandey, Suyog Sarda, David Farago

Overview of this book

LLVM is currently the point of interest for many firms, and has a very active open source community. It provides us with a compiler infrastructure that can be used to write a compiler for a language. It provides us with a set of reusable libraries that can be used to optimize code, and a target-independent code generator to generate code for different backends. It also provides us with a lot of other utility tools that can be easily integrated into compiler projects. This book details how you can use the LLVM compiler infrastructure libraries effectively, and will enable you to design your own custom compiler with LLVM in a snap. We start with the basics, where you’ll get to know all about LLVM. We then cover how you can use LLVM library calls to emit intermediate representation (IR) of simple and complex high-level language paradigms. Moving on, we show you how to implement optimizations at different levels, write an optimization pass, generate code that is independent of a target, and then map the code generated to a backend. The book also walks you through CLANG, IR to IR transformations, advanced IR block transformations, and target machines. By the end of this book, you’ll be able to easily utilize the LLVM libraries in your own projects.
Table of Contents (14 chapters)
LLVM Essentials
Credits
About the Authors
About the Reviewer
www.PacktPub.com
Preface
Index

Scheduling and emitting machine instructions


Until now, we have been performing the operations on DAG. Now, for the machine to execute, we need to convert the DAGs into instruction that the machine can execute. One step towards it is emitting the list of instructions into MachineBasicBlock. This is done by the Scheduler, whose goal is to linearize the DAGs. The scheduling is dependent on the target architecture, as certain Targets will have target specific hooks which can affect the scheduling.

The class InstrEmitter::EmitMachineNode takes SDNode *Node as one of the input parameters for which it will be emitting machine instructions of the class MachineInstr. These instructions are emitted into a MachineBasicBlock.

The function calls EmitSubregNode, EmitCopyToRegClassNode and EmitRegSequence for the handling of subreg insert/extract, COPY_TO_REGCLASS, and REG_SEQUENCE respectively.

The call MachineInstrBuilder MIB = BuildMI(*MF, Node->getDebugLoc(), II); is used to build the Machine Instruction...