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LLVM Code Generation
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LLVM Code Generation
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Overview of this book
The LLVM infrastructure is a popular compiler ecosystem widely used in the tech industry and academia. This technology is crucial for both experienced and aspiring compiler developers looking to make an impact in the field. Written by Quentin Colombet, a veteran LLVM contributor and architect of the GlobalISel framework, this book provides a primer on the main aspects of LLVM, with an emphasis on its backend infrastructure; that is, everything needed to transform the intermediate representation (IR) produced by frontends like Clang into assembly code and object files.
You’ll learn how to write an optimizing code generator for a toy backend in LLVM. The chapters will guide you step by step through building this backend while exploring key concepts, such as the ABI, cost model, and register allocation. You’ll also find out how to express these concepts using LLVM's existing infrastructure and how established backends address these challenges. Furthermore, the book features code snippets that demonstrate the actual APIs.
By the end of this book, you’ll have gained a deeper understanding of LLVM. The concepts presented are expected to remain stable across different LLVM versions, making this book a reliable quick reference guide for understanding LLVM.
Table of Contents (30 chapters)
Preface
Building LLVM and Understanding the Directory Structure
Contributing to LLVM
Compiler Basics and How They Map to LLVM APIs
Writing Your First Optimization
Dealing with Pass Managers
TableGen – LLVM Swiss Army Knife for Modeling
Part 2: Middle-End: LLVM IR to LLVM IR
Understanding LLVM IR
Survey of the Existing Passes
Introducing Target-Specific Constructs
Hands-On Debugging LLVM IR Passes
Part 3: Introduction to the Backend
Getting Started with the Backend
Getting Started with the Machine Code Layer
The Machine Pass Pipeline
Part 4: LLVM IR to Machine IR
Getting Started with Instruction Selection
Instruction Selection: The IR Building Phase
Instruction Selection: The Legalization Phase
Instruction Selection: The Selection Phase and Beyond
Part 5: Final Lowering and Optimizations
Instruction Scheduling
Register Allocation
Lowering of the Stack Layout
Getting Started with the Assembler
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Index
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