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LLVM Code Generation
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Now that you are familiar with the LLVM middle-end, you are ready to go deeper into the inner workings of the LLVM infrastructure.
This part introduces you to the backend part of the LLVM infrastructure, where you start dealing almost exclusively with target-specific constructs such as the registers or instructions available.
The backend part of LLVM features its own intermediate representation (IR), called the Machine IR, and its own pass pipeline, called the code generation (CodeGen) pipeline. Unlike the LLVM IR, the Machine IR is fully customizable, and one of the tasks of a backend author is to teach the LLVM infrastructure about the instruction set architecture (ISA) of their target.
Therefore, this part teaches you the following: