Let's take an example of implementing a 32-bit immediate load with high/low pairs, where MOVW implies moving a 16-bit low immediate and a clear 16 high bit, and MOVT implies moving a 16-bit high immediate.
There can be various ways to implement this multiple instruction lowering. We can do this by using pseudo-instructions or in the selection DAG-to-DAG phase.
To do it without pseudo-instructions, define some constraints. The two instructions must be ordered. MOVW clears the high 16 bits. Its output is read by MOVT to fill the high 16 bits. This can be done by specifying the constraints in tablegen:
def MOVLOi16 : MOV<0b1000, "movw", (ins i32imm:$imm), [(set i32:$dst, i32imm_lo:$imm)]>; def MOVHIi16 : MOV<0b1010, "movt", (ins GRRegs:$src1, i32imm:$imm), [/* No Pattern */]>;The second way is to define a pseudo-instruction in the
.tdfile:def MOVi32 : InstTOY<(outs GRRegs:$dst), (ins i32imm:$src...