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Reverse Engineering Armv8-A Systems
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The LDR instruction stands for load register, which is used to load a word of data from memory into a register. Here, a word is a unit of data that the CPU handles at once, and it usually matches the register size. For example, in AArch64 Armv8-A, the word size is 64 bits.
First, let’s review the syntax of the LDR instruction in its basic form. Then, we will examine the LDR instruction with the offset addressing mode.
Let’s take a look at Figure 4.1, which illustrates the syntax of the LDR instruction.

Figure 4.1: The syntax of the LDR instruction
Here, <Xn> is the base register, which holds the memory address to access, while <Xt> is the destination register. In other words, we can say that it reads the data from <Xt> and stores it in <Xn>. When running the LDR instruction illustrated in Figure 4.1, it performs the following actions simultaneously: