6. Target-independent Code Generator | LLVM Cookbook

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LLVM Cookbook

By : Mayur Pandey, Suyog Sarda

2 (9)

LLVM Cookbook

2 (9)

By: Mayur Pandey, Suyog Sarda

Overview of this book

The book is for compiler programmers who are familiar with concepts of compilers and want to indulge in understanding, exploring, and using LLVM infrastructure in a meaningful way in their work. This book is also for programmers who are not directly involved in compiler projects but are often involved in development phases where they write thousands of lines of code. With knowledge of how compilers work, they will be able to code in an optimal way and improve performance with clean code.

Preface

Preface

What this book covers

What you need for this book

Who this book is for

Sections

Conventions

Reader feedback

Customer support

Free Chapter

1. LLVM Design and Use

1. LLVM Design and Use

Introduction

Understanding modular design

Cross-compiling Clang/LLVM

Converting a C source code to LLVM assembly

Converting IR to LLVM bitcode

Converting LLVM bitcode to target machine assembly

Converting LLVM bitcode back to LLVM assembly

Transforming LLVM IR

Linking LLVM bitcode

Executing LLVM bitcode

Using the C frontend Clang

Using the GO frontend

Using DragonEgg

2. Steps in Writing a Frontend

2. Steps in Writing a Frontend

Introduction

Defining a TOY language

Implementing a lexer

Defining Abstract Syntax Tree

Implementing a parser

Parsing simple expressions

Parsing binary expressions

Invoking a driver for parsing

Running lexer and parser on our TOY language

Defining IR code generation methods for each AST class

Generating IR code for expressions

Generating IR code for functions

Adding IR optimization support

3. Extending the Frontend and Adding JIT Support

3. Extending the Frontend and Adding JIT Support

Introduction

Handling decision making paradigms – if/then/else constructs

Generating code for loops

Handling user-defined operators – binary operators

Handling user-defined operators – unary operators

Adding JIT support

4. Preparing Optimizations

4. Preparing Optimizations

Introduction

Various levels of optimization

Writing your own LLVM pass

Running your own pass with the opt tool

Using another pass in a new pass

Registering a pass with pass manager

Writing an analysis pass

Writing an alias analysis pass

Using other analysis passes

5. Implementing Optimizations

5. Implementing Optimizations

Introduction

Writing a dead code elimination pass

Writing an inlining transformation pass

Writing a pass for memory optimization

Combining LLVM IR

Transforming and optimizing loops

Reassociating expressions

Vectorizing IR

Other optimization passes

6. Target-independent Code Generator

6. Target-independent Code Generator

Introduction

The life of an LLVM IR instruction

Visualizing LLVM IR CFG using GraphViz

Describing targets using TableGen

Defining an instruction set

Adding a machine code descriptor

Implementing the MachineInstrBuilder class

Implementing the MachineBasicBlock class

Implementing the MachineFunction class

Writing an instruction selector

Legalizing SelectionDAG

Optimizing SelectionDAG

Selecting instruction from the DAG

Scheduling instructions in SelectionDAG

7. Optimizing the Machine Code

7. Optimizing the Machine Code

Introduction

Eliminating common subexpression from machine code

Analyzing live intervals

Allocating registers

Inserting the prologue-epilogue code

Code emission

Tail call optimization

Sibling call optimisation

8. Writing an LLVM Backend

8. Writing an LLVM Backend

Introduction

Defining registers and registers sets

Defining the calling convention

Defining the instruction set

Implementing frame lowering

Printing an instruction

Selecting an instruction

Adding instruction encoding

Supporting a subtarget

Lowering to multiple instructions

Registering a target

9. Using LLVM for Various Useful Projects

9. Using LLVM for Various Useful Projects

Introduction

Exception handling in LLVM

Using sanitizers

Writing the garbage collector with LLVM

Converting LLVM IR to JavaScript

Using the Clang Static Analyzer

Using bugpoint

Using LLDB

Using LLVM utility passes

Index

Index

Defining an instruction set

The instruction set of an architecture varies according to various features present in the architecture. This recipe demonstrates how instruction sets are defined for the target architecture.

Getting ready

Three things are defined in the instruction target description file: operands, an assembly string, and an instruction pattern. The specification contains a list of definitions or outputs and a list of uses or inputs. There can be different operand classes such as the register class, and immediate or more complex register + imm operands.

Here, a simple add instruction definition is demonstrated. It takes two registers for the input and one register for the output.

How to do it…

Create a new file called SAMPLEInstrInfo.td in the lib/Target/SAMPLE folder:
```
$ vi SAMPLEInstrInfo.td
```
Specify the operands, assembly string, and instruction pattern for the add instruction between two register operands:
```
def ADDrr : InstSAMPLE<(outs GRRegs:$dst),
          (ins GRRegs:$src1...
```

CONTINUE READING

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Programming languages

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