Book Image

FPGA Programming for Beginners

By : Frank Bruno
5 (1)
Book Image

FPGA Programming for Beginners

5 (1)
By: Frank Bruno

Overview of this book

Field Programmable Gate Arrays (FPGAs) have now become a core part of most modern electronic and computer systems. However, to implement your ideas in the real world, you need to get your head around the FPGA architecture, its toolset, and critical design considerations. FPGA Programming for Beginners will help you bring your ideas to life by guiding you through the entire process of programming FPGAs and designing hardware circuits using SystemVerilog. The book will introduce you to the FPGA and Xilinx architectures and show you how to work on your first project, which includes toggling an LED. You’ll then cover SystemVerilog RTL designs and their implementations. Next, you’ll get to grips with using the combinational Boolean logic design and work on several projects, such as creating a calculator and updating it using FPGA resources. Later, the book will take you through the advanced concepts of AXI and show you how to create a keyboard using PS/2. Finally, you’ll be able to consolidate all the projects in the book to create a unified output using a Video Graphics Array (VGA) controller that you’ll design. By the end of this SystemVerilog FPGA book, you’ll have learned how to work with FPGA systems and be able to design hardware circuits and boards using SystemVerilog programming.

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Table of Contents (16 chapters)
Preface
Preface
Who this book is for
What this book covers
To get the most out of this book
Download the example code files
Download the color images
Conventions used
Get in touch
Reviews
1
Section 1: Introduction to FPGAs and Xilinx Architectures
Section 1: Introduction to FPGAs and Xilinx Architectures
Free Chapter
2
Chapter 1: Introduction to FPGA Architectures and Xilinx Vivado
Chapter 1: Introduction to FPGA Architectures and Xilinx Vivado
Technical requirements
What is an ASIC?
How does a company create a programmable device using an ASIC process?
Introducing FPGAs
ASMBL architecture
Introduction to the Vivado toolset and evaluation boards
Evaluation boards
Introducing Vivado
Summary
Questions
Further reading
3
Section 2: Introduction to Verilog RTL Design, Simulation, and Implementation
Section 2: Introduction to Verilog RTL Design, Simulation, and Implementation
4
Chapter 2: Combinational Logic
Chapter 2: Combinational Logic
Technical requirements
Creating SystemVerilog modules
Introducing data types
Packaging up code using functions
Project 1 – creating combinational logic
Summary
Questions
Further reading
5
Chapter 3: Counting Button Presses
Chapter 3: Counting Button Presses
Technical requirements
What is a sequential element?
Project 2 – Counting button presses
Deep dive on synchronization
Summary
Questions
Further reading
6
Chapter 4: Let's Build a Calculator
Chapter 4: Let's Build a Calculator
Technical requirements
Implementing our first state machine
Project 3 – Building a simple calculator
Project 4 – Keeping cars in line
Summary
Questions
Further reading
7
Chapter 5: FPGA Resources and How to Use Them
Chapter 5: FPGA Resources and How to Use Them
Technical requirements
Project 5 – Listening and learning
Project 6 – Using the temperature sensor
Summary
Questions
Further reading
8
Chapter 6: Math, Parallelism, and Pipelined Design
Chapter 6: Math, Parallelism, and Pipelined Design
Technical requirements
Introduction to fixed-point numbers
Project 7 – Using fixed-point arithmetic in our temperature sensor
Project 8 – Updating the temperature sensor project to a pipelined floating-point implementation
Parallel designs
Summary
Questions
Further reading
9
Section 3: Interfacing with External Components
Section 3: Interfacing with External Components
10
Chapter 7: Introduction to AXI
Chapter 7: Introduction to AXI
Technical requirements
AXI streaming
Project 9 – creating IPs for Vivado using AXI streaming interfaces
AXI4 interfaces (full and AXI-Lite)
Developing IPs – AXI-Lite, full, and streaming
Summary
Questions
Further reading
11
Chapter 8: Lots of Data? MIG and DDR2
Chapter 8: Lots of Data? MIG and DDR2
Technical requirements
Project 10 – introducing external memory
Other external memory types
Summary
Questions
Further reading
12
Chapter 9: A Better Way to Display – VGA
Chapter 9: A Better Way to Display – VGA
Technical requirements
Project 11 – Introducing the VGA
Summary
Questions
Challenge
Further reading
13
Chapter 10: Bringing It All Together
Chapter 10: Bringing It All Together
Technical requirements
Investigating the keyboard interface
Project 12 – keyboard handling
Project 13 – bringing it all together
Summary
Questions
Challenge
Further reading
14
Chapter 11: Advanced Topics
Chapter 11: Advanced Topics
Technical requirements
Exploring more advanced SystemVerilog constructs
Exploring some more advanced verification constructs
Other gotchas and how to avoid them
Summary
Questions
Further reading
Why subscribe?
15
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Project 12 – keyboard handling

We've looked at what the PS/2 interface looks like. Let's now put together a simple interface so that we can test our knowledge before we move on to our design integration. The first step is that we need to debounce our PS/2 signals. I've put together a debounce circuit and test bench so we can verify it. This cannot be built as is, but let's look at it. Open up https://github.com/PacktPublishing/Learn-FPGA-Programming/blob/master/CH10/build/debounce/debounce.xpr. This version of the code will act as a reusable core. We want to make sure that we only change state after we've seen the CYCLES number of the same value. This will act as our debouncing circuit.

The interface is straightforward, as we can see in the following code:

module debounce
  #(parameter   CYCLES = 16)
  (input wire   clk,
   input wire   sig_in,
   output...
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