Book Image

FPGA Programming for Beginners

By : Frank Bruno
5 (1)
Book Image

FPGA Programming for Beginners

5 (1)
By: Frank Bruno

Overview of this book

Field Programmable Gate Arrays (FPGAs) have now become a core part of most modern electronic and computer systems. However, to implement your ideas in the real world, you need to get your head around the FPGA architecture, its toolset, and critical design considerations. FPGA Programming for Beginners will help you bring your ideas to life by guiding you through the entire process of programming FPGAs and designing hardware circuits using SystemVerilog. The book will introduce you to the FPGA and Xilinx architectures and show you how to work on your first project, which includes toggling an LED. You’ll then cover SystemVerilog RTL designs and their implementations. Next, you’ll get to grips with using the combinational Boolean logic design and work on several projects, such as creating a calculator and updating it using FPGA resources. Later, the book will take you through the advanced concepts of AXI and show you how to create a keyboard using PS/2. Finally, you’ll be able to consolidate all the projects in the book to create a unified output using a Video Graphics Array (VGA) controller that you’ll design. By the end of this SystemVerilog FPGA book, you’ll have learned how to work with FPGA systems and be able to design hardware circuits and boards using SystemVerilog programming.
Table of Contents (16 chapters)
1
Section 1: Introduction to FPGAs and Xilinx Architectures
3
Section 2: Introduction to Verilog RTL Design, Simulation, and Implementation
9
Section 3: Interfacing with External Components

Questions

  1. A packed array is used to infer memories. True or false?
  2. A break statement can be used in a for loop when?

    a) Any time.

    b) If it's possible to rewrite the for loop in such a way as to not need the break.

    c) Only if you can reverse the direction of the loop; that is, go from low to high instead of high to low.

  3. Size the add_unsigned, add_signed, and mult signals:
    Logic unsigned [7:0] a_unsigned;
    logic unsigned [7:0] b_unsigned;
    logic signed [7:0] a_signed;
    logic signed [7:0] b_signed;
    assign add_unsigned = a_unsigned + b_unsigned;
    assign add_signed = a_signed + b_signed;
    assign mult = a_unsigned * b_unsigned;
  4. Division is a very costly operation. Look at the supported Vivado constructs in the Vivado Synthesis manual (Further reading). Can you easily replace the multiply operation with a division operation? What is possible without custom code?

Challenge

Look at the following add_sub module:

  logic signed [BITS/2-1:0]   ...