Sign In Start Free Trial
Account

Add to playlist

Create a Playlist

Modal Close icon
You need to login to use this feature.
  • Book Overview & Buying LLVM Code Generation
  • Table Of Contents Toc
LLVM Code Generation

LLVM Code Generation

By : Quentin Colombet
3 (2)
close
close
LLVM Code Generation

LLVM Code Generation

3 (2)
By: Quentin Colombet

Overview of this book

The LLVM infrastructure is a popular compiler ecosystem widely used in the tech industry and academia. This technology is crucial for both experienced and aspiring compiler developers looking to make an impact in the field. Written by Quentin Colombet, a veteran LLVM contributor and architect of the GlobalISel framework, this book provides a primer on the main aspects of LLVM, with an emphasis on its backend infrastructure; that is, everything needed to transform the intermediate representation (IR) produced by frontends like Clang into assembly code and object files. You’ll learn how to write an optimizing code generator for a toy backend in LLVM. The chapters will guide you step by step through building this backend while exploring key concepts, such as the ABI, cost model, and register allocation. You’ll also find out how to express these concepts using LLVM's existing infrastructure and how established backends address these challenges. Furthermore, the book features code snippets that demonstrate the actual APIs. By the end of this book, you’ll have gained a deeper understanding of LLVM. The concepts presented are expected to remain stable across different LLVM versions, making this book a reliable quick reference guide for understanding LLVM.
Table of Contents (30 chapters)
close
close
Lock Free Chapter
1
Part 1: Getting Started with LLVM
8
Part 2: Middle-End: LLVM IR to LLVM IR
13
Part 3: Introduction to the Backend
17
Part 4: LLVM IR to Machine IR
22
Part 5: Final Lowering and Optimizations
28
Other Books You May Enjoy
29
Index

Overview of the IR building

The IR building phase of the selectors is conceptually simple except that it is also responsible for materializing the ABI of the input LLVM IR function. In other words, the pure IR building part of this phase is straightforward: one LLVM IR instruction maps to one or several SDNode instances for the SelectionDAG Instruction Selection (SDISel) framework or MachineInstr instances with generic opcodes for the Global Instruction Selection (GlobalISel) framework.

Note

We will use SDISel and GlobalISel as nouns in the rest of this chapter as well as FastISel for the SDISel sub-selector (see Chapter 14 for more details on how they relate to each other.)

For instance, the add instruction in LLVM IR translates into the ISD::ADD SDNode instance and G_ADD MachineInstr instance. Also, in SDISel, the IR building phase, implemented with the SelectionDAGBuilder class, translates pointer types into integer types of the right size.

The pure...

CONTINUE READING
83
Tech Concepts
36
Programming languages
73
Tech Tools
Icon Unlimited access to the largest independent learning library in tech of over 8,000 expert-authored tech books and videos.
Icon Innovative learning tools, including AI book assistants, code context explainers, and text-to-speech.
Icon 50+ new titles added per month and exclusive early access to books as they are being written.
LLVM Code Generation
notes
bookmark Notes and Bookmarks search Search in title playlist Add to playlist download Download options font-size Font size

Change the font size

margin-width Margin width

Change margin width

day-mode Day/Sepia/Night Modes

Change background colour

Close icon Search
Country selected

Close icon Your notes and bookmarks

Confirmation

Modal Close icon
claim successful

Buy this book with your credits?

Modal Close icon
Are you sure you want to buy this book with one of your credits?
Close
YES, BUY

Submit Your Feedback

Modal Close icon
Modal Close icon
Modal Close icon