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  • Book Overview & Buying LLVM Code Generation
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LLVM Code Generation

LLVM Code Generation

By : Quentin Colombet
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LLVM Code Generation

LLVM Code Generation

1 (1)
By: Quentin Colombet

Overview of this book

The LLVM infrastructure is a popular compiler ecosystem widely used in the tech industry and academia. This technology is crucial for both experienced and aspiring compiler developers looking to make an impact in the field. Written by Quentin Colombet, a veteran LLVM contributor and architect of the GlobalISel framework, this book provides a primer on the main aspects of LLVM, with an emphasis on its backend infrastructure; that is, everything needed to transform the intermediate representation (IR) produced by frontends like Clang into assembly code and object files. You’ll learn how to write an optimizing code generator for a toy backend in LLVM. The chapters will guide you step by step through building this backend while exploring key concepts, such as the ABI, cost model, and register allocation. You’ll also find out how to express these concepts using LLVM's existing infrastructure and how established backends address these challenges. Furthermore, the book features code snippets that demonstrate the actual APIs. By the end of this book, you’ll have gained a deeper understanding of LLVM. The concepts presented are expected to remain stable across different LLVM versions, making this book a reliable quick reference guide for understanding LLVM.
Table of Contents (30 chapters)
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Part 1: Getting Started with LLVM
8
Part 2: Middle-End: LLVM IR to LLVM IR
13
Part 3: Introduction to the Backend
17
Part 4: LLVM IR to Machine IR
22
Part 5: Final Lowering and Optimizations
28
Other Books You May Enjoy
29
Index

Register bank selection

The register bank selection phase, represented by the RegBankSelect pass, is a mandatory pass in GlobalISel. This phase is responsible for assigning register banks to all the virtual registers of the current MachineFunction instance. If you are not using GlobalISel, you can skip this section. However, you may still want to read through it to see what GlobalISel has to offer on something that SDISel cannot do.

The goal of the register bank selection

The concept of register bank selection came with GlobalISel and solved the problem of optimizing cross-register bank copies. A cross-register bank copy is an instruction that cannot be coalesced (removed) during register allocation because the source and destination of the copy live on different register files or banks. For instance, on an architecture with general purpose registers (GPRs) and vector registers (VRs), the GPRs may be used for integer operations and the VRs may be used for vector type operations...

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LLVM Code Generation
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