Preface

Welcome to LLVM Code Generation

The LLVM infrastructure is a set of libraries that can be composed to build various tools that manipulate intermediate representations (IRs) and in particular compilers – that is, tools that translate an input language (for instance, C++) into an output language (for instance, x86 assembly code) while preserving the semantics of the input language. One of the most known LLVM-based projects is the Clang C++ toolchain.

In this book, we focus on the usage of the LLVM infrastructure to write compiler backends – that is, the part of the compiler that is responsible for producing the assembly code for a specific architecture such as the AArch64 or x86 central processing units (CPUs) for writing backends.

An LLVM backend hinges around two main Irs: the LLVM IR and the Machine IR. The differences between these representations do not matter at this point; what matters is that you must learn how to manipulate both to be able to write a backend in LLVM.

The LLVM IR has been extensively covered in literature already, but the Machine IR (the parts that are closer to the assembly representation) has not.

This book proposes to close that gap with explanations of how things work and concrete examples that illustrate the implementation of concepts. We will also cover the LLVM IR and the related mechanism to give you a complete picture of the LLVM infrastructure and help you understand how things connect in a fully functional backend that goes from the LLVM IR to the assembly code.

To summarize, to fully appreciate the capabilities of the LLVM infrastructure, this book covers every component that is involved in emitting assembly code, including the LLVM IR, the pass pipeline, TableGen (LLVM’s own domain-specific language (DSL)), and the relevant TableGen backend, the Machine IR, and some part of the machine code (MC) layer.