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Modern Computer Architecture and Organization - Third Edition
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Combinational logic does not support storing data for functions such as processor registers. To provide data storage, we can feed a gate's output back to the input of a gate preceding it in the signal chain.
A latch is a single-bit memory device constructed from logic gates. Figure 2.10 illustrates a simple latch called the Set-Reset, or SR, latch. The feature that provides memory in this circuit is the feedback from the AND gate's output to the OR gate's input.

Figure 2.10: SR latch circuit
By manipulating the inputs S and R, the circuit can set Q to high, reset Q to low, or maintain Q at its current value. In the hold state, both S and R are low, and the state of the output Q is retained. Pulsing S high (going from low to high, then back to low) while R is low causes the output Q to go high and remain at that level. Pulsing R high and then low while S is low causes Q to go low and stay low. If both S and R are set high, the R input overrides the S input and forces...